1. Field of the Invention
The present invention relates to an integrated-circuit tester for testing ICs (semiconductor integrated circuit elements) for defects and, more particularly, to an IC tester of the type that does simultaneous testing of plural ICs.
2. Background of the Related Art
With reference to FIGS. 1 through 5, a description will be given, in particular, of the general construction of what is called a handler which automatically transfers ICs in an IC tester for testing a number of ICs at one time. FIG. 1 is a plan view schematically showing the handler in the form of functional blocks. Reference numeral 100 denotes a chamber section with a tester head placed therein, 200 an IC storage section for housing not-yet-tested ICs and for housing tested ICs according to their test results, 300 a loader section for loading the not-yet-tested ICs into the chamber section 100, 400 an unloader section for unloading tested ICs from the chamber section 100 while sorting them out according to their test results, and TST test trays. The not-yet-tested ICs are loaded on the test trays TST in the loader section 300 and brought into the chamber section 100, and after being tested therein, they are brought out therefrom and into the unloader section 400.
The chamber section 100 comprises a constant temperature chamber wherein the ICs loaded on the test trays TST undergo an intended high or low-temperature thermal stress, a test chamber 102 wherein the ICs thus thermally stressed in the constant temperature chamber 101 are held in contact with a tester head 104 during testing, and a cooling/heating chamber 103 for removing the thermal stress from the ICs tested in the test chamber 102. When the ICs are heated at a high temperature in the constant temperature chamber 101, they are cooled down to room temperature by an air blow in the cooling/heating chamber 103 after the test in the test chamber 102 and then carried out therefrom to the unloader section 400. When the ICs are cooled down to a low temperature as of -30.degree. C. or so prior to the test, they are heated by hot air or heater in the cooling/heating chamber 103 up to a temperature at which substantially no condensation occurs, and then the tested ICs are carried out to the unloader section 400.
The constant temperature chamber 101 and the cooling/heating chamber 103 are disposed upwardly of the test chamber 102. Extended between the upper portions of the constant temperature chamber 101 and the cooling/heating chamber 103 as shown in FIG. 2 is a mounting plate 105, on which a test tray transfer unit 108 is mounted so that the test trays TST are transferred from the cooling/heating chamber 103 side to the constant temperature chamber 101. The test trays TST are loaded with not-yet-tested ICs in the loader section 300 and carried into the constant temperature chamber 101. In the constant temperature chamber 101 there is placed a vertical transfer unit, by which plural test trays are supported in the wait state until the test chamber 102 becomes empty. During waiting the ICs are subjected to high- or low-temperature thermal stress. In the test chamber 102 there is placed centrally thereof a tester head 104, with which the ICs on the test tray TST brought to the position just above it are electrically connected for test. After the test the test tray TST is carried out of the test chamber 102 and into the cooling/heating chamber 103 for cooling the ICs down to room temperature, thereafter being discharged into the unloader section 400.
As depicted in FIGS. 1 and 2, the IC storage section 200 has a yet-to-be untested IC stocker 201 for housing ICs to be tested and a tested IC stocker 202 for housing ICs sorted out according to their test results. In the yet-to-be untested IC stocker 201 universal trays KST carrying the ICs to be tested are stacked on top of each other in layers. The universal trays KST are brought to the loader section 300, wherein the ICs on the universal trays KST are reloaded therefrom onto the test tray TST at a standstill in the loader section 300. To reload the ICs from the universal tray KST onto the test tray TST in the loader section 300, it is possible to employ an X-Y transfer unit 304 which comprises, as shown in FIG. 2, two rails 301 planted on the mounting plate 105, a movable arm 302 mounted on the rails 301 in a manner to be movable to and fro between the test tray TST and the universal tray KST (in the direction assumed to be the Y direction in this specification), and a movable head 303 supported by the movable arm 302 and movable along it in the X direction. The movable head 303 has downward suction heads, which move while sucking air; hence, the ICs on the universal trays KST are sucked up therefrom by the suction heads and brought onto the test trays TST. The number of suction heads mounted on the movable head 303 is, for example, eight or so, by which eight ICs are transferred onto the test tray TST at one time.
FIG. 3 shows the construction of the test tray TST. The test tray TST has a rectangular frame 12, plural parallel crosspieces 13 placed thereacross at equal intervals and plural equally spaced mounting pieces 14 protrusively provided on the crosspieces 13 along their both marginal edges and on opposite sides 12a and 12b of the frame 12 along their inside marginal edges. Between the opposed crosspieces 13 and between them and the opposite sides 12a and 12b there are defined IC holder housing portions 15 each having two opposed mounting pieces 14. In each IC holder housing portion 15 there is housed one concave IC holder 16 molded of a resinous material, which is loosely secured by fasteners 17 to the two mounting pieces 14. The test trays TST each have about 16 by 4 IC holders 16 mounted thereon.
The IC holders 16 are all identical in shape and in size and each receives an IC in its concavity 19. The concavity 19 is determined according to the shape of the IC to be received therein. That is, the IC holder 16 is prepared for each shape of the IC and changed according to the IC configuration. To this end, each IC holder 16 has holes hl for affixing it to the mounting pieces 14 and positioning pin receiving holes h2 made in its opposite end portions.
As shown in FIG. 4, the IC holder 16 receives and holds therein the IC with its pins 18 extending downward for contact with the tester head 104. The IC pins 18 are pressed against contacts 19 of an IC socket to establish electric connections between the IC and the tester head 104. To perform this, a presser 20 is disposed above the tester head 104, by which the IC received in the IC holder 16 is pressed down into contact with the tester head 104.
For example, as depicted in FIG. 5, ICs are arrayed in the test tray TST with 4 rows and 16 columns and the ICs of every fourth columns (indicated by diagonal shading) are connected to the tester head 104 or tested at one time. In the first round of test, 16 ICs of columns 1, 5, 9 and 13 are connected to the tester head 104, then in the second round the test tray TST is shifted by one column and 16 ICs of columns 2, 6, 10 and 14 are tested; this operation is repeated four times to test all the ICs mounted on the test tray TST. The test results are stored at addresses that are determined, for example, by identification numbers given to the test tray TST and the numbers of the IC holders 16 assigned thereto in the test tray TST.
The test results are used as data to sort out non-defectives from defectives when the tested ICs are transferred from the test tray TST to the universal tray KST in the unloader section 400. This data is erased upon completion of the above assortment. Conventionally, the number of failures of ICs tested so far through the contact of the respective IC socket of the tester head 104 (which contact refers to the whole set of contacts of each IC socket) is stored in one of storage areas which have a one-to-one correspondence with the contacts of individual IC sockets; when the number of failures in any storage area exceeds a predetermined number, an alarm is raised and the handler is automatically stopped and, at the same time, on the assumption that the contact in question is malfunctioning, an instruction is issued to inhibit subsequent loading of ICs in the IC holder 16 at the position corresponding to that contact.
When failures concentrates on a particular contact, the handler is automatically stopped from operation, while at the same time an alarm is issued to inform an operator of the abnormality, urging him to check the contacts of all IC sockets. If no abnormality is found in the contacts, then the operator has to perform manipulations for resuming the operation of the IC tester. That is, the operator is required to carry out work for calling off the alarm, for tuning off the automatic stop mechanism and for turning on a restart switch.
In the other hand, when it is decided that the contact, at which failures have abnormally occurred, is malfunctioning, the operator performs manipulations for resuming the operation of the IC tester after inputting via a keyboard an instruction to inhibit subsequent feeding of ICs to the malfunctioning contact.
As described above, once the handler is automatically stopped due to the contact malfunction, the operator is required to do many tasks prior to restarting the operation of the IC tester; since the work for setting the failing contact in the unused state is particularly cumbersome, the operator's workload is heavy. In particular, simultaneous operation of many IC testers increases the operator's workload.
Such a heavy operator's workload could be reduced by the use of a control method that automatically sets the failed contact in the unused state without automatically stopping the operation of the handler.
This control method reduces the operator's workload, but the handler automatically sets the contact in the unused state, so that even if most of the contacts in the tester head 104 are in the unused state, nothing makes the operator aware of it and the test continues under inefficient circumstances.